1. Field
Example embodiments relate to apparatuses and/or methods that may program data in memory devices. Also, example embodiments relate to multi-bit (multi-level) programming apparatuses and/or methods that may program data in multi-level memory devices.
2. Description of Related Art
A single-level cell (SLC) memory device stores one bit of data in a single memory cell. The SLC memory is referred to as a single-bit cell (SBC) memory. The SLC memory stores and reads data of one bit at a voltage level included in two distributions that are divided by a threshold voltage level programmed in a memory cell. The programmed threshold voltage has a distribution within a certain range due to a fine electric characteristic difference between the SLC memories. For example, when a voltage level read from the memory cell is greater than 0.5V and less than 1.5V, it is determined that the data stored in the memory cell has a logic value of “1”. When the voltage level read from the memory cell is greater than 2.5V and less than 3.5V, it is determined that the data stored in the memory cell has a logic value of “0”. The data stored in the memory cell is classified depending on the difference between cell currents and/or cell voltages during the reading operations.
Meanwhile, a multi-level cell (MLC) memory device that can store data of two or more bits in a single memory cell has been proposed in response to a need for higher integration of memory. The MLC memory device is also referred to as a multi-bit cell (MBC) memory. However, as the number of bits stored in the single memory cell increases, reliability deteriorates and read-failure rate increases. To store ‘m’ bits in a single memory cell, 2m voltage level distributions are required. But, since the voltage window for a memory device is limited, the difference in threshold voltage between adjacent bits decreases as ‘m’ increases, causing the read-failure rate to increase. For this reason, it is difficult to improve storage density using the MLC memory device according to a conventional art.
Accordingly, an MLC memory device is being widely used and thus new multi-level (multi-bit) programming apparatuses and/or methods of changing a data storing process are proposed in order to reduce a read-failure rate in the present specification.